ARCv2: PAE40: Explicitly set MSB counterpart of SLC region ops addresses
authorAlexey Brodkin <Alexey.Brodkin@synopsys.com>
Tue, 1 Aug 2017 09:58:47 +0000 (12:58 +0300)
committerVineet Gupta <vgupta@synopsys.com>
Fri, 4 Aug 2017 08:26:34 +0000 (13:56 +0530)
commit7d79cee2c6540ea64dd917a14e2fd63d4ac3d3c0
tree359b387e93411565dfd21dc446340bca12e0ab2c
parent2e332fec2f2c996f8d5447b0946ca43bb0ae4b42
ARCv2: PAE40: Explicitly set MSB counterpart of SLC region ops addresses

It is necessary to explicitly set both SLC_AUX_RGN_START1 and SLC_AUX_RGN_END1
which hold MSB bits of the physical address correspondingly of region start
and end otherwise SLC region operation is executed in unpredictable manner

Without this patch, SLC flushes on HSDK (IOC disabled) were taking
seconds.

Cc: stable@vger.kernel.org #4.4+
Reported-by: Vladimir Kondratiev <vladimir.kondratiev@intel.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
[vgupta: PAR40 regs only written if PAE40 exist]
arch/arc/include/asm/cache.h
arch/arc/mm/cache.c