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[POWERPC] 8xx: Off-by-one fixes to SCC parameter RAM definitions
authorKalle Pokki <kalle.pokki@iki.fi>
Sat, 11 Nov 2006 10:09:39 +0000 (12:09 +0200)
committerPaul Mackerras <paulus@samba.org>
Mon, 4 Dec 2006 09:39:40 +0000 (20:39 +1100)
commit78dc4c20de0f2cb2aa6d4542f965f889be6da775
tree7a3e5ea34cacc4813c597941c80635fd2debad7ctree | snapshot (tar.gz zip)
parentadaa3a796282e2fa3bc48bc57bccd01ce891b8d2commit | diff
[POWERPC] 8xx: Off-by-one fixes to SCC parameter RAM definitions

The SCC parameter RAM areas are mapped wrong in MPC8xx device descriptions. All
memory areas overlap with the next one, so that I2C, SPI, SMC1 and SMC2 cannot
be enabled if the four SCCs are.

Signed-off-by: Kalle Pokki <kalle.pokki@iki.fi>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/ppc/syslib/mpc8xx_devices.c diff | blob | blame | history