drm/i915/glk: Apply cdclk workaround for DP audio
authorPandiyan, Dhinakaran <dhinakaran.pandiyan@intel.com>
Wed, 8 Mar 2017 00:12:51 +0000 (16:12 -0800)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Wed, 22 Mar 2017 19:04:33 +0000 (16:04 -0300)
commit78cfa580f81e69857815c59c8908aee454726da1
treeaa1eee45e7f2462e1244a0a30aaef1fe56c82910
parent9f7886d07f36f9be23c9bcc526b7f9dae65db8c5
drm/i915/glk: Apply cdclk workaround for DP audio

Implement the DP-Audio cdclk restriction for GLK, similar to what is
implemented for BDW and other GEN9 platforms. The max. pixel clock
adjustment for GLK, however factors in the 2 pixels per clock output that
GLK generates.

Separating min. cdclk and max. pixel_rate would be nicer, but let's
defer that to future and fix the GLK bug for now.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1488931972-2865-1-git-send-email-dhinakaran.pandiyan@intel.com
drivers/gpu/drm/i915/intel_cdclk.c