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(parent: f4c72cc) | patch
Fix zero length sys_cacheflush
authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Wed, 19 Oct 2005 10:57:14 +0000 (19:57 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 29 Oct 2005 18:32:44 +0000 (19:32 +0100)
commit750ccf687ff9adbf2a16066a3a2757d0f761384c
tree935c776cb9927f34b7038247249e4de68c93a562tree | snapshot (tar.gz zip)
parentf4c72cc737561aab0d9c7f877abbc0a853f1c465commit | diff
Fix zero length sys_cacheflush

Cacheflush(0, 0, 0) was crashing the system.  This is because
flush_icache_range(start, end) tries to flushing whole address space
(0 - ~0UL) if both start and end are zero.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/cache.c diff | blob | blame | history
Motorola kernel-slsi