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(parent: aaecdf6) | patch
drm/i915: Fix gen4 GPU reset
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 21 Nov 2014 19:54:25 +0000 (21:54 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 3 Dec 2014 08:29:36 +0000 (09:29 +0100)
commit73bbf6bd907906dcbdc78f3af38a722c0fe498d8
treee212bcbf12131ac43b021095701135ad0e2320ectree | snapshot (tar.gz zip)
parentaaecdf611a05cac26a94713bad25297e60225c29commit | diff
drm/i915: Fix gen4 GPU reset

On pre-ctg the reset bit directly controls the reset signal. We must
assert it for >=20usec and then deassert it. Bit 1 is a RO status bit
which should also go down when the reset is no longer asserted.

Tested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history
drivers/gpu/drm/i915/intel_uncore.c diff | blob | blame | history
Motorola kernel-slsi