clk: vc5: Add bindings for IDT VersaClock 5P49V6901
authorMarek Vasut <marek.vasut@gmail.com>
Sun, 9 Jul 2017 13:28:13 +0000 (15:28 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Mon, 17 Jul 2017 18:51:00 +0000 (11:51 -0700)
commit73100e79c7368dd30c06bcfc04252bab5dc48783
tree478a2ca153a74a56fe1a794e5e19cb208910e4fa
parent8c1ebe9762670159ca982167131af63c94ff1571
clk: vc5: Add bindings for IDT VersaClock 5P49V6901

IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers.
Input clock source can be taken from either external crystal or from
external reference clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Firago <alexey_firago@mentor.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-renesas-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Documentation/devicetree/bindings/clock/idt,versaclock5.txt