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[POWERPC] FSL: Rework PCI/PCIe support for 85xx/86xx
authorKumar Gala <galak@kernel.crashing.org>
Mon, 14 Jan 2008 23:02:19 +0000 (17:02 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Jan 2008 01:31:16 +0000 (19:31 -0600)
commit72b122cc301858dcf283fe6731e61322c9772cf4
treea2feead9fd094a3e77d3be7e25d9a38cd49f4c84tree | snapshot (tar.gz zip)
parentb188b2aefe2b0e7d34c98106e20214f806f812a3commit | diff
[POWERPC] FSL: Rework PCI/PCIe support for 85xx/86xx

The current PCI code for Freescale 85xx/86xx was treating the virtual
P2P PCIe bridge as a transparent bridge.  Rather than doing that fixup
the virtual P2P bridge by copying the resources from the PHB.

Also, fixup a bit of the code for dealing with resource_size_t being
64-bits and how we set ATMU registers for >4G.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/sysdev/fsl_pci.c diff | blob | blame | history
kernel source for telekom puls (alcatel/mediatek)