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ARCv2: mm: THP: Implement flush_pmd_tlb_range() optimization
authorVineet Gupta <vgupta@synopsys.com>
Fri, 27 Feb 2015 14:06:35 +0000 (19:36 +0530)
committerVineet Gupta <vgupta@synopsys.com>
Sat, 17 Oct 2015 12:18:21 +0000 (17:48 +0530)
commit722fe8fd365a08bd53e9dd105009ab810107b02d
tree4077fb1d215b61bc53e3b5a5a34ea584c92ceac3tree | snapshot (tar.gz zip)
parent12ebc1581ad114543ae822aa3a12f76072e2f902commit | diff
ARCv2: mm: THP: Implement flush_pmd_tlb_range() optimization

Implement the TLB flush routine to evict a sepcific Super TLB entry,
vs. moving to a new ASID on every such flush.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
arch/arc/include/asm/hugepage.h diff | blob | blame | history
arch/arc/mm/tlb.c diff | blob | blame | history