clk: sunxi: Add support for sun9i A80 USB clocks and resets
authorChen-Yu Tsai <wens@csie.org>
Tue, 27 Jan 2015 19:54:07 +0000 (03:54 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 23 Feb 2015 08:25:54 +0000 (09:25 +0100)
commit71f32f56cb54303a1b6ce6811373f57d87de40d3
treea558860eda063760e331be9389c77f34dc7cde94
parent6089ef19c9dadaf0e3378f75eca65af861cd3974
clk: sunxi: Add support for sun9i A80 USB clocks and resets

The USB controller/phy clocks and reset controls are in a separate
address block, unlike previous SoCs where they were in the clock
controller. Also, access to the address block is controlled by a
clock gate to AHB.

Add support for resets requiring a clock to be enabled when
asserting/deasserting the reset controls, and add the sun9i USB
clocks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Documentation/devicetree/bindings/clock/sunxi.txt
drivers/clk/sunxi/clk-usb.c