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(parent: 71422db) | patch
clk: tegra: Fix Tegra210 PLLU initialization
authorAlex Frid <afrid@nvidia.com>
Tue, 25 Jul 2017 10:34:15 +0000 (13:34 +0300)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 23 Aug 2017 23:00:42 +0000 (16:00 -0700)
commit7157c69a99510c2234fc0b6001f21776085fda73
tree633a37c49cb0bb8320203a0f943fcec86bed93datree | snapshot (tar.gz zip)
parent71422dbb89ee4198c705ad14c75bfc72625f95c2commit | diff
clk: tegra: Fix Tegra210 PLLU initialization

- Added necessary delays in PLLU enable sequence during initialization
- Applied PLLU lock to all secondary gates (PLLU_48M and PLLU_60M were
missing).

Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/tegra/clk-tegra210.c diff | blob | blame | history