drm/i915: Track OACONTROL register enable/disable during parsing
authorBrad Volkin <bradley.d.volkin@intel.com>
Fri, 28 Mar 2014 17:21:50 +0000 (10:21 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 2 Apr 2014 09:34:58 +0000 (11:34 +0200)
commit6e66ea137ff5bd292ed734c53f569892068a7a70
tree2b7029072bc1e42e828d8815da116bbde6283a35
parentb651000b222701527c730b82ccb0ce42d99a6abe
drm/i915: Track OACONTROL register enable/disable during parsing

There is some thought that the data from the performance counters enabled
via OACONTROL should only be available to the process that enabled counting.
To limit snooping, require that any batch buffer which sets OACONTROL to a
non-zero value also sets it back to 0 before the end of the batch.

This requires limiting OACONTROL writes to happen via MI_LOAD_REGISTER_IMM
so that we can access the value being written. This should be in line with
the expected use case for writing OACONTROL.

v2: Drop an unnecessary '? true : false'

Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_cmd_parser.c