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ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs
authorVineet Gupta <vgupta@synopsys.com>
Mon, 3 Aug 2015 12:57:56 +0000 (18:27 +0530)
committerVineet Gupta <vgupta@synopsys.com>
Tue, 4 Aug 2015 03:56:30 +0000 (09:26 +0530)
commit6de7abfbad1c6a45893a47a17c2ac91b551aa90d
tree11d53df8337ba1f498dcfb4d08a10c41d5e638edtree | snapshot (tar.gz zip)
parente13c42ecbe580509451e021ba2586871e5b47640commit | diff
ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
arch/arc/plat-axs10x/axs10x.c diff | blob | blame | history