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MIPS: OCTEON: Save and restore CP2 SHA3 state
authorDavid Daney <david.daney@cavium.com>
Thu, 15 Jan 2015 13:11:07 +0000 (16:11 +0300)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 20 Feb 2015 14:29:08 +0000 (15:29 +0100)
commit6b3a287e6351b00df6624b41c160e1c0817f40e2
tree6315e36070f0d3ab2562382ffa624d1cb02d9e5btree | snapshot (tar.gz zip)
parentd6e41525e356a8dc4b9ad6249a644d4123240881commit | diff
MIPS: OCTEON: Save and restore CP2 SHA3 state

Allocate new save space, and then save/restore the registers if
OCTEON III.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8935/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/processor.h diff | blob | blame | history
arch/mips/kernel/asm-offsets.c diff | blob | blame | history
arch/mips/kernel/octeon_switch.S diff | blob | blame | history
Motorola kernel-slsi