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(parent: 41bf498) | patch
perf, x86: Add new AMD family 15h msrs to perfctr reservation code
authorRobert Richter <robert.richter@amd.com>
Wed, 2 Feb 2011 16:40:58 +0000 (17:40 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 16 Feb 2011 12:30:50 +0000 (13:30 +0100)
commit69d8e1e8ac0a7d829f1c0fd5bd07eb3022d9a1a0
treeef7e6e92cdadfa390a4a0fa1b9e67de26db91ddctree | snapshot (tar.gz zip)
parent41bf498949a263fa0b2d32524b89d696ac330e94commit | diff
perf, x86: Add new AMD family 15h msrs to perfctr reservation code

This patch allows the reservation of perfctrs with new msr addresses
introduced for AMD cpu family 15h (0xc0010200/0xc0010201, etc).

Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1296664860-10886-4-git-send-email-robert.richter@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perfctr-watchdog.c diff | blob | blame | history