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(parent: 5e43e25) | patch
clk: tegra: Add peripheral registers for bank Y
authorThierry Reding <treding@nvidia.com>
Mon, 23 Mar 2015 09:52:45 +0000 (10:52 +0100)
committerThierry Reding <treding@nvidia.com>
Fri, 10 Apr 2015 14:04:20 +0000 (16:04 +0200)
commit699b477a0d3a5bc68034a1520a4337ea0a20f63b
treecbd74f6791b022d63f8b556b042afde65f006d18tree | snapshot (tar.gz zip)
parent5e43e259171e1eee8bc074d9c44be434e685087bcommit | diff
clk: tegra: Add peripheral registers for bank Y

Tegra210 has an extra bank of peripheral clock registers. Add it to the
generic peripheral clock code.

Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk.c diff | blob | blame | history
Motorola kernel-slsi