drm/i915/gvt: Optimize MMIO register handling for some large MMIO blocks
authorChangbin Du <changbin.du@intel.com>
Tue, 6 Jun 2017 07:56:09 +0000 (15:56 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 8 Jun 2017 05:59:19 +0000 (13:59 +0800)
commit65f9f6febf12ed5bbcebd3599698eb78b03e5b69
treea9f1d792175a49ecd7808a309a4de4ac8a87764b
parentaf2c6399aabeb7a7107657a469cb2f16b55dfbae
drm/i915/gvt: Optimize MMIO register handling for some large MMIO blocks

Some of traced MMIO registers are a large continuous section. These
stuffed the MMIO lookup hash table and so waste lots of memory and
get much lower lookup performance.

Here we picked out these sections by special handling. These sections
include:
  o Display pipe registers, total 768.
  o The PVINFO page, total 1024.
  o MCHBAR_MIRROR, total 65536.
  o CSR_MMIO, total 3072.

So we removed 70,400 items from the hash table, and speed up guest
boot time by ~500ms.

v2:
  o add a local function find_mmio_block().
  o fix comments.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/gvt/mmio.c
drivers/gpu/drm/i915/gvt/mmio.h