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drm/amdgpu:change SR-IOV DMAframe scheme
authorMonk Liu <Monk.Liu@amd.com>
Mon, 1 May 2017 09:05:02 +0000 (17:05 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 21:40:25 +0000 (17:40 -0400)
commit635e71329858f2051c015d2a8c863bbce04d1e1b
tree525c91dcdfc6eba0e1a9d53207a70299904ff864tree | snapshot (tar.gz zip)
parent9524354358a6ee80f1624b515f157f44b8a0ab2bcommit | diff
drm/amdgpu:change SR-IOV DMAframe scheme

According to CP/hw team requirment, to support PAL/CHAINED-IB
MCBP, kernel driver must guarantee DE_META must be inserted
right prior to the work_load DE IB (with PREEMPT flag), there
cannot be any non-work_load DE IB between-in DE_META and
work_load DE IB.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c diff | blob | blame | history
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c diff | blob | blame | history