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(parent: 81b312f) | patch
crypto: nx-842 - Mask XERS0 bit in return value
authorHaren Myneni <haren@linux.vnet.ibm.com>
Sun, 13 Dec 2015 11:30:41 +0000 (03:30 -0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Thu, 17 Dec 2015 08:42:12 +0000 (16:42 +0800)
commit6333ed8f26cf77311088d2e2b7cf16d8480bcbb2
treef6b0d2fb24dc4b71d3aee51a16885c13488d7567tree | snapshot (tar.gz zip)
parent81b312f11dfd7466462d94667f0a8df14a412d2acommit | diff
crypto: nx-842 - Mask XERS0 bit in return value

NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is
nothing to do with NX request. Since this bit can be set with other
valuable return status, mast this bit.

One of other bits (INITIATED, BUSY or REJECTED) will be returned for
any given NX request.

Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
arch/powerpc/include/asm/icswx.h diff | blob | blame | history
drivers/crypto/nx/nx-842-powernv.c diff | blob | blame | history