MIPS: ath79: Correctly name the defines for the PLL_FB register
authorAlban Bedel <albeu@free.fr>
Sun, 19 Apr 2015 12:30:02 +0000 (14:30 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 21 Jun 2015 19:53:49 +0000 (21:53 +0200)
commit626a0695a6d98338063c528d113d9ee4ba00cd78
tree03c999ddbda06315325bb635736c77ecb30c9539
parentda628e8b8b824b15c75fbc6b3defed2ff38475fe
MIPS: ath79: Correctly name the defines for the PLL_FB register

This register is named PLL_FB and is not a divider but a multiplier.
To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and
ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and
ARxxxx_PLL_FB_MASK.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9772/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/ath79/clock.c
arch/mips/include/asm/mach-ath79/ar71xx_regs.h