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(parent: 3ef288a) | patch
i7core_edac: Fix ecc enable shift
authorKeith Mannthey <kmannth@us.ibm.com>
Thu, 3 Sep 2009 02:46:59 +0000 (23:46 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 10 May 2010 14:44:56 +0000 (11:44 -0300)
commit61053fdedb2080dadc18dc37abbba90d2e74bc03
tree482b54f2dfbbb776ecc69b6ed3e54ba3d03cd219tree | snapshot (tar.gz zip)
parent3ef288a98307adc9d3f83321b26281567f348ec6commit | diff
i7core_edac: Fix ecc enable shift

From: Keith Mannthey <kmannth@us.ibm.com>

Simple correction to a shift value.
ECC_ENABLED is bit 4 of MC_STATUS, Dev 3 Fun 0 Offset 0x4c

This correctly identifies the state of the ECC at the machine.

Signed-off-by: Keith Mannthey <kmannth@us.ibm.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/edac/i7core_edac.c diff | blob | blame | history
kernel source for telekom puls (alcatel/mediatek)