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ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition
authorLiu Ying <Ying.Liu@freescale.com>
Thu, 12 Feb 2015 06:01:25 +0000 (14:01 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 2 Mar 2015 12:51:55 +0000 (20:51 +0800)
commit5f80e19081e233698c8ea77ed2dd84a66f49fc54
tree1cd084e17602544692ad03e8116d0eacdfd4f4f0tree | snapshot (tar.gz zip)
parentaf321d2e32b3167129b35856316d4c55126556cfcommit | diff
ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition

This patch adds a macro to define the GPR3 MIPI muxing control register field
shift bits.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h diff | blob | blame | history