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(parent: 6b67c39) | patch
pinctrl: intel: merrifield: Correct UART pin lists
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Fri, 4 Aug 2017 16:26:34 +0000 (19:26 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 7 Aug 2017 13:23:11 +0000 (15:23 +0200)
commit5d996132d921c391af5f267123eca1a6a3148ecd
tree54d759f27596155a1ae9dd7fc97525fdafef3414tree | snapshot (tar.gz zip)
parent6b67c3906cd74d88da4f6717b4b294bd52fce56acommit | diff
pinctrl: intel: merrifield: Correct UART pin lists

UART pin lists consist GPIO numbers which is simply wrong.
Replace it by pin numbers.

Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/intel/pinctrl-merrifield.c diff | blob | blame | history