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(parent: c50d11f) | patch
clk: samsung: pll: Add support for rate configuration of PLL46xx
authorTomasz Figa <t.figa@samsung.com>
Mon, 26 Aug 2013 17:09:07 +0000 (19:09 +0200)
committerMike Turquette <mturquette@linaro.org>
Fri, 6 Sep 2013 20:33:47 +0000 (13:33 -0700)
commit5c89658a2ef38bace96cf9d4474d59a32d06609d
tree59083e99d135a101c58599dc3ea4b2334eef7524tree | snapshot (tar.gz zip)
parentc50d11f35a021fc357922797a7638d4d6ca70b9ecommit | diff
clk: samsung: pll: Add support for rate configuration of PLL46xx

This patch implements round_rate and set_rate callbacks of PLL46xx
driver to allow reconfiguration of PLL at runtime.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/samsung/clk-pll.c diff | blob | blame | history
drivers/clk/samsung/clk-pll.h diff | blob | blame | history