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(parent: 8ae7225) | patch
tools/power turbostat: print IRTL MSRs
authorLen Brown <len.brown@intel.com>
Wed, 6 Apr 2016 21:15:55 +0000 (17:15 -0400)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Thu, 7 Apr 2016 20:18:32 +0000 (22:18 +0200)
commit5a63426e2a18775ed05b20e3bc90c68bacb1f68a
tree851ad05e09e5b5a865a6284b1d0538f17b3e1afctree | snapshot (tar.gz zip)
parent8ae7225591fd15aac89769cbebb3b5ecc8b12fe5commit | diff
tools/power turbostat: print IRTL MSRs

Some processors use the Interrupt Response Time Limit (IRTL) MSR value
to describe the maximum IRQ response time latency for deep
package C-states.  (Though others have the register, but do not use it)
Lets print it out to give insight into the cases where it is used.

IRTL begain in SNB, with PC3/PC6/PC7, and HSW added PC8/PC9/PC10.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
arch/x86/include/asm/msr-index.h diff | blob | blame | history
tools/power/x86/turbostat/turbostat.c diff | blob | blame | history