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(parent: 515c1a4) | patch
clk: sunxi: Add A23 APB0 divider clock support
authorChen-Yu Tsai <wens@csie.org>
Thu, 3 Jul 2014 14:55:41 +0000 (22:55 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 7 Jul 2014 08:46:21 +0000 (10:46 +0200)
commit57a1fbf28424561a080b34fbdd04661282aea40e
treecef5423b166b17498992288248389167fb24418ftree | snapshot (tar.gz zip)
parent515c1a4bdcd9b55e2c21e897a9ca276bd708d145commit | diff
clk: sunxi: Add A23 APB0 divider clock support

The A23 has an almost identical PRCM clock tree. The difference in
the APB0 clock is the smallest divisor is 1, instead of 2.

This patch adds a separate sun8i-a23-apb0-clk driver to support it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Documentation/devicetree/bindings/clock/sunxi.txt diff | blob | blame | history
drivers/clk/sunxi/Makefile diff | blob | blame | history
drivers/clk/sunxi/clk-sun8i-apb0.c [new file with mode: 0644] blob