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[ARM] 4133/1: Add ISB after changes to CP15 registers
authorCatalin Marinas <catalin.marinas@arm.com>
Mon, 5 Feb 2007 13:48:02 +0000 (14:48 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 8 Feb 2007 14:49:31 +0000 (14:49 +0000)
commit56660faf9e8088542e85207df45fb9c5f4dd3909
tree6bfebe63a5510af52ec39ea55810239080a00fb0tree | snapshot (tar.gz zip)
parente6a5d66f58431c66c79e236f722a5ad7dd959ef3commit | diff
[ARM] 4133/1: Add ISB after changes to CP15 registers

According to ARM ARM, changes to the CP15 registers are only
guaranteed to be visible after an Instruction Synchronization Barrier
(ISB). This patch adds the ISB at the end of set_cr and
set_copro_access functions and also moves them further down in the
file, below the isb macro definition.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
include/asm-arm/system.h diff | blob | blame | history
Motorola kernel-slsi