usb: dwc2: host: wait 3ms for controller stabilization
authorGregory Herrero <gregory.herrero@intel.com>
Tue, 22 Sep 2015 13:16:50 +0000 (15:16 +0200)
committerFelipe Balbi <balbi@ti.com>
Thu, 1 Oct 2015 17:40:18 +0000 (12:40 -0500)
commit5634e016cf6e2e0c9651081f5c554f59e1050fc5
treed1b86b04e1195c1cc8594ad4f1b238e11269f822
parentcad73da26cb9392db3449ab35e506ea13efd1888
usb: dwc2: host: wait 3ms for controller stabilization

Some high speed mass storage devices fail to enumerate with following
error:

Cannot enable port %i.  Maybe the USB cable is bad?

This happens only when the device is plugged while the controller
is in hibernation state. After exiting hibernation, the controller
detects the device as a low speed device and fail to enumerate it.

Problem occurs only if HPRT0.PWR bit is programmed in a too short
delay after exiting hibernation. Dumping hprt register in
_dwc2_hcd_resume() directly after dwc2_exit_hibernation() shows that
HPRT0.LNSTS (D+/D- level) becomes valid approximately 2ms after
exiting hibernation.

Since dwc2_exit_hibernation() is called from atomic context, move the
delay out of this function.

Delay value is experimental and not mentioned in Synopsys
documentation. To be on the safe side 3ms delay is used.

Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by: John Youn <johnyoun@synopsys.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc2/hcd.c