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(parent: 4b819c6) | patch
platform/x86: intel_mid_powerbtn: Acknowledge interrupts
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 19 Jan 2017 16:39:45 +0000 (18:39 +0200)
committerDarren Hart <dvhart@linux.intel.com>
Sat, 4 Feb 2017 01:47:23 +0000 (02:47 +0100)
commit553e9c1861b7f91492eb6e209adff81507624fa6
tree18f4b811d8a098374d76a51acd06fdd28c47b025tree | snapshot (tar.gz zip)
parent4b819c6d5f3c9f9efb8ab334f735f6a223e84d14commit | diff
platform/x86: intel_mid_powerbtn: Acknowledge interrupts

Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_mid_powerbtn.c diff | blob | blame | history
Motorola kernel-slsi