powerpc/85xx: Rework MPC8548CDS device trees
authorKumar Gala <galak@kernel.crashing.org>
Fri, 4 Nov 2011 05:26:10 +0000 (00:26 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Nov 2011 08:01:36 +0000 (02:01 -0600)
commit53e23dcb1894604ac8377fd4293d29116b9ae904
tree183bffb4703b662234606f6f76671eeca7c3cd0f
parentb7f817547d7e1b56c1afbf4411df6fd73a0d78e9
powerpc/85xx: Rework MPC8548CDS device trees

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Moved mdio nodes up one level instead of under tsec nodes
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Removed CPU properties setup by u-boot to match other .dts
* Added localbus node, but no chipselect details at this point
* Added MPIC / PCIe msi node
* Dropping "fsl,mpc8548-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8548cds.dts