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drm/amdgpu: Support IOMMU on Raven
authorYong Zhao <Yong.Zhao@amd.com>
Thu, 27 Jul 2017 16:48:22 +0000 (12:48 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Aug 2017 18:45:58 +0000 (14:45 -0400)
commit51ac7eec620b8ec705955ad2c845a5b5fed6b40f
treedb1de1243647e0e728a331f0e38b12da9a6223f8tree | snapshot (tar.gz zip)
parent2046d46db9166bddc84778f0b3477f6d1e9068eacommit | diff
drm/amdgpu: Support IOMMU on Raven

We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for
PDEs and setting S bit to 1 for PTEs when the corresponding addresses
are not occupied by gpu driver allocated buffers.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c diff | blob | blame | history
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h diff | blob | blame | history
Motorola kernel-slsi