PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings
authorViresh Kumar <viresh.kumar@linaro.org>
Tue, 9 Feb 2016 05:00:37 +0000 (10:30 +0530)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Wed, 10 Feb 2016 00:11:54 +0000 (01:11 +0100)
commit50f8cfbd5897ca182d43f4caf19937153f17a604
treedc7452a65bc38875f6015a9a63d86a98bbdc66de
parent2174344765f472895c076d703c9cdc58215e1393
PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings

V2 bindings have better support for clock-latency and voltage-tolerance
and doesn't need special care. To use callbacks, like
dev_pm_opp_get_max_{transition|volt}_latency(), irrespective of the
bindings, the core needs to know clock-latency/voltage-tolerance for the
earlier bindings.

This patch reads clock-latency/voltage-tolerance from the device node,
irrespective of the bindings (to keep it simple) and use them only for
V1 bindings.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/base/power/opp/core.c
drivers/base/power/opp/opp.h