MIPS: ath79: Fix the DDR control initialization on ar71xx and ar934x
authorAlban Bedel <albeu@free.fr>
Tue, 17 Nov 2015 08:40:07 +0000 (09:40 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 20 Nov 2015 11:10:09 +0000 (12:10 +0100)
commit5011a7e808c9fec643d752c5a495a48f27268a48
tree647f26b1da38f51691475358fb0d9a94c583bbd1
parent95486e4979e56e7da2fbb4fd32eb54d672b1e074
MIPS: ath79: Fix the DDR control initialization on ar71xx and ar934x

The DDR control initialization needs to know the SoC type, however
ath79_detect_sys_type() was called after ath79_ddr_ctrl_init().
Reverse the order to fix the DDR control initialization on ar71xx and
ar934x.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
CC: stable@vger.kernel.org # v4.2+
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/ath79/setup.c