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(parent: 006cac8) | patch
mmc: sdhci-cadence: fix bit shift of read data from PHY port
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Tue, 14 Feb 2017 11:05:40 +0000 (20:05 +0900)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 15 Feb 2017 10:32:14 +0000 (11:32 +0100)
commit4e03f628b464e0580abadf5161eaa38c61d20943
tree6d929f2c69d9bd4f725c2bb3266e2400d1b8224etree | snapshot (tar.gz zip)
parent006cac8262987981fb10a0360726875b48123b73commit | diff
mmc: sdhci-cadence: fix bit shift of read data from PHY port

This macro is currently unused, but it may be useful for debug use.
Fix it just in case.

Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-cadence.c diff | blob | blame | history