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(parent: 5343325) | patch
clk: mvebu: add missing CESA gate clk
authorBoris Brezillon <boris.brezillon@free-electrons.com>
Tue, 26 May 2015 12:42:57 +0000 (14:42 +0200)
committerMichael Turquette <mturquette@linaro.org>
Wed, 3 Jun 2015 22:17:07 +0000 (15:17 -0700)
commit4d52b2acefdfceae0e47ed08324a96f511dc80b1
tree7348889850e9f896bda2842ad0e3c15165832fadtree | snapshot (tar.gz zip)
parent5343325ff3dd299f459fa9dacbd95dca5c9bf215commit | diff
clk: mvebu: add missing CESA gate clk

Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt diff | blob | blame | history
drivers/clk/mvebu/armada-370.c diff | blob | blame | history