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(parent: 6fb9c4f) | patch
[ARM] 4169/1: S3C2410: align to a cache line
authorMatt Reimer <mreimer@vpop.net>
Mon, 12 Feb 2007 20:00:32 +0000 (21:00 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 12 Feb 2007 20:58:06 +0000 (20:58 +0000)
commit4b210faf0944172e55489bef83babf520bccc1c4
tree0c3ea77facacfa57e766293dc99812f1ce39cfaatree | snapshot (tar.gz zip)
parent6fb9c4f87018f90d7aa415c5c8a4b22e6a000c5bcommit | diff
[ARM] 4169/1: S3C2410: align to a cache line

Align the code to the start of the next cache line, rather than the start of the next 256-byte page.

(On i386 and ARM, the ".align" assembler directive takes its first argument as the number of low-order bits that must be zero, not the number of words comprising a cache line.)

Supercedes patch 4166.

Signed-off-by: Matt Reimer <mreimer@vpop.net>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Motorola kernel-slsi