projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 88a1b12) | patch
ASoC: Use a normal cache sync for WM8903
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Fri, 2 Dec 2011 18:23:37 +0000 (18:23 +0000)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Sat, 3 Dec 2011 10:59:45 +0000 (10:59 +0000)
commit45e967553f3466f773ecd418c09fe92b753f18b0
tree6b82204d900297b27229bc01be40cc394d215665tree | snapshot (tar.gz zip)
parent88a1b12b9c70d1b2ea4d11bdfa6ae65c9570909bcommit | diff
ASoC: Use a normal cache sync for WM8903

The driver used to use a complicated method to sync the register cache
after having brought the bias level up to standby in resume due to the
use of the write sequencer to manage the initial power up. Now that we
don't use the write sequencer there is no need for this and we can just
use snd_soc_cache_sync() directly.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
sound/soc/codecs/wm8903.c diff | blob | blame | history