clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
authorPhilipp Zabel <p.zabel@pengutronix.de>
Mon, 30 Nov 2015 21:07:53 +0000 (22:07 +0100)
committerPhilipp Zabel <p.zabel@pengutronix.de>
Fri, 6 May 2016 15:47:40 +0000 (17:47 +0200)
commit4585945bf1d348d006f7270beea3dae09fee3413
treeb41934ae0bb5a4f9c615f86808abdb5cc2365b01
parent06445994fece2ae458419fbadc1b2107336615d6
clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/mediatek/clk-mt8173.c
include/dt-bindings/clock/mt8173-clk.h