[media] exynos4-is: Correct input DMA YUV order configuration
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 21 Mar 2013 17:22:34 +0000 (14:22 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Thu, 4 Apr 2013 23:23:53 +0000 (20:23 -0300)
commit439797980af4bddfc2b86a44ddb573c5e48a1fcc
tree3cee3905e065b5c0fd5715e7ff32b26bd779194a
parente90ad659cde4d11ccbc935adcfe018799afcc22d
[media] exynos4-is: Correct input DMA YUV order configuration

This patch fixes erroneous setup of the YUV order caused by not
clearing FIMC_REG_MSCTRL_ORDER422_MASK bit field before setting
proper FIMC_REG_MSCTRL_ORDER422 bits. This resulted in false
colors for YUYV, YVYU, UYVY, VYUY color formats, depending in
what sequence those were configured by user space.
YUV order definitions are corrected so that following convention
is used:
        | byte3 | byte2 | byte1 | byte0
 -------+-------+-------+-------+------
 YCBYCR | CR    | Y     | CB    | Y
 YCRYCB | CB    | Y     | CR    | Y
 CBYCRY | Y     | CR    | Y     | CB
 CRYCBY | Y     | CB    | Y     | CR

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/platform/exynos4-is/fimc-core.c
drivers/media/platform/exynos4-is/fimc-reg.c
drivers/media/platform/exynos4-is/fimc-reg.h