ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
authorDaniel Mack <daniel@zonque.org>
Fri, 6 Jul 2018 20:15:00 +0000 (22:15 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 24 Aug 2018 11:09:13 +0000 (13:09 +0200)
commit431f0995a5e86727f69a7fc53007a00fc5ef088d
tree3c83308247173245dac973161a23d1b497c92de6
parent924d13694a13bf1c6be9a4df744ae2fcfcb1fa71
ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

[ Upstream commit 0c1049dcb4ceec640d8bd797335bcbebdcab44d2 ]

PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mach-pxa/irq.c