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drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfaces
authorMichel Dänzer <michel.daenzer@amd.com>
Wed, 18 Sep 2013 16:23:51 +0000 (18:23 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 20 Sep 2013 21:33:40 +0000 (17:33 -0400)
commit42baf21d91d4f52f5b9a4d11dc8e7b1e3b93de7c
tree78f1c6e6a17ddf080afe7a6c30ab0415a959c83ctree | snapshot (tar.gz zip)
parenta537314e0b539e22934d3cffeb0b1f476e56491ccommit | diff
drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfaces

CIK uses a different index for 1D DST surfaces compared to SI.  Expose
the new index so libdrm_radeon can use it properly for userspace
drivers.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
include/uapi/drm/radeon_drm.h diff | blob | blame | history