drm/i915: vlv/chv: fix DSI sideband register accessing
authorImre Deak <imre.deak@intel.com>
Mon, 19 May 2014 08:41:18 +0000 (11:41 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 19 May 2014 15:50:14 +0000 (17:50 +0200)
commit42a88e97bcdaf596ccd4017a4e064add0cf623db
treec4571f60eb645ec603903d3fa2a3c9bc33a838c4
parentcf63e4a2206be00336c17f42a810da5ce47e0e78
drm/i915: vlv/chv: fix DSI sideband register accessing

So far we used the wrong opcodes to access the DSI registers, so the
register writes during DSI programming didn't actually succeed and left
the registers unchanged. This wasn't a problem for the initial modeset,
where the BIOS-programmed values happened to work, but after resuming
from s0ix these registers are reset and failing to program them results
in a blank screen.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_sideband.c