drm/i915: Restore the DPLL calculation logic for 9xx platform
authorZhao Yakui <yakui.zhao@intel.com>
Fri, 20 Nov 2009 03:24:18 +0000 (11:24 +0800)
committerEric Anholt <eric@anholt.net>
Wed, 25 Nov 2009 21:03:12 +0000 (13:03 -0800)
commit4215866059b126590aceddfe9f846595b0c1f458
treeb942b729718c4b3e40033c02ba20ba8e3cc14212
parentd1fcea6a529d22212b324f26cd660c85b289a026
drm/i915: Restore the DPLL calculation logic for 9xx platform

The DPLL calculation logic for 9xx platform is changed in:
commit 652c393a3368af84359da37c45afc35a91144960
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Mon Aug 17 13:31:43 2009 -0700

    drm/i915: add dynamic clock frequency control

Maybe we will get the different M/N/P combination with that by using the
previous dpll calculation logic.

So restore the DPLL calculation logic for 9xx platform.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/intel_display.c