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clk: samsung: Fix mau_epll clock definition for exynos5422
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Fri, 21 Jul 2017 14:18:19 +0000 (16:18 +0200)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Wed, 9 Aug 2017 15:16:55 +0000 (17:16 +0200)
commit41097f25e9b2091d5d0a309cceb788704f21e1d2
treeaca22fd18070c709450beea74cf977dfe1ab62b8tree | snapshot (tar.gz zip)
parent5771a8c08880cdca3bfb4a3fc6d309d6bba20877commit | diff
clk: samsung: Fix mau_epll clock definition for exynos5422

Parent clock of the MAU_EPLL gate clock on exynos5422 is
"mout_user_mau_epll", not "mout_mau_epll_clk". This change
only affects exynos5422/5800.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos5420.c diff | blob | blame | history