clk: qcom: Support bypass RCG configuration
authorStephen Boyd <sboyd@codeaurora.org>
Fri, 11 Jul 2014 19:55:27 +0000 (12:55 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 15 Jul 2014 23:38:59 +0000 (16:38 -0700)
commit404c1ff67d241e8503fd46a09d324343aa321a8a
treeef9e18a1029de024540d02550d1a99d162d164a1
parent24d8fba44af32163334c1f162e65ba93eb2993fd
clk: qcom: Support bypass RCG configuration

In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.

Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/clk-rcg.c
drivers/clk/qcom/clk-rcg.h
drivers/clk/qcom/mmcc-msm8960.c