ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs
authorVineet Gupta <Vineet.Gupta1@synopsys.com>
Fri, 11 Sep 2015 23:32:22 +0000 (16:32 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Sat, 12 Sep 2015 02:34:01 +0000 (19:34 -0700)
commit3ebb0540c20d6670396ccee9ff6794c095fa9311
tree3d33498c7c1412dd2570fc770a45943cdef126ba
parentded0e250b58a27af6034a8ab9226cbcdf7c0d847
ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs

Newer bitfiles needs the reduced clk even for SMP builds

Cc: <stable@vger.kernel.org> #4.2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
arch/arc/plat-axs10x/axs10x.c