x86: tsc: Add missing Baytrail frequency to the table
authorMika Westerberg <mika.westerberg@linux.intel.com>
Wed, 19 Feb 2014 11:52:30 +0000 (13:52 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Wed, 19 Feb 2014 16:12:24 +0000 (17:12 +0100)
commit3e11e818bfd7bd4a8e1214970337bab73ffed32d
tree064ee3ebe0532e9d4c7e04fd7654aa81d00828a7
parent5f0e030930d715920be4de638084aaf8653867e8
x86: tsc: Add missing Baytrail frequency to the table

Intel Baytrail is based on Silvermont core so MSR_FSB_FREQ[2:0] == 0 means
that the CPU reference clock runs at 83.3MHz. Add this missing frequency to
the table.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Bin Gao <bin.gao@linux.intel.com>
Cc: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: http://lkml.kernel.org/r/1392810750-18660-2-git-send-email-mika.westerberg@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/kernel/tsc_msr.c