drm/i915/mst: use max link not sink lane count
authorJani Nikula <jani.nikula@intel.com>
Thu, 6 Apr 2017 13:44:14 +0000 (16:44 +0300)
committerJani Nikula <jani.nikula@intel.com>
Tue, 11 Apr 2017 13:54:31 +0000 (16:54 +0300)
commit3d65a735d8341830ef8ec57e290ed785b01085a1
treef040ba8b65616b77218c0881957bf34a6ba4f26e
parent540b0b7fe915858870be6cfe0fecd1fa85ccb4d6
drm/i915/mst: use max link not sink lane count

The source might not support as many lanes as the sink, or the link
training might have failed at higher lane counts. Take these into
account.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/cf59530acafaf9258fb643d321ad251b44f34e29.1491485983.git.jani.nikula@intel.com
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_dp_mst.c
drivers/gpu/drm/i915/intel_drv.h