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(parent: 62125a4) | patch
CLK: TI: DRA7: Add APLL support
authorJ Keerthy <j-keerthy@ti.com>
Tue, 23 Jul 2013 06:35:37 +0000 (12:05 +0530)
committerMike Turquette <mturquette@linaro.org>
Fri, 17 Jan 2014 20:35:31 +0000 (12:35 -0800)
commit3cf467a9969db8297dcf783c5b09b0df8fda863b
treebc17da1cc3f192ade4e939e0ae1193a9a66a0bb0tree | snapshot (tar.gz zip)
parent62125a46cd717ad8fa6a64d260d46a0a108e6222commit | diff
CLK: TI: DRA7: Add APLL support

The patch adds support for DRA7 PCIe APLL. The APLL
sources the optional functional clocks for PCIe module.

APLL stands for Analog PLL. This is different when comapred
with DPLL meaning Digital PLL, the phase detection is done
using an analog circuit.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Documentation/devicetree/bindings/clock/ti/apll.txt [new file with mode: 0644] blob
drivers/clk/ti/Makefile diff | blob | blame | history
drivers/clk/ti/apll.c [new file with mode: 0644] blob