clk: samsung: exynos5250: Fix ACP gate register offset
authorAbhilash Kesavan <a.kesavan@samsung.com>
Thu, 12 Dec 2013 03:02:00 +0000 (08:32 +0530)
committerTomasz Figa <t.figa@samsung.com>
Mon, 30 Dec 2013 16:53:26 +0000 (17:53 +0100)
commit3bf34666a0cce5234ac677ed2fbe5cea82c71329
tree2b3b3bc1bb14008e43bd9d8de92caa8a690d62b5
parent97c3557c3e0413efb1f021f582d1459760e22727
clk: samsung: exynos5250: Fix ACP gate register offset

The CLK_GATE_IP_ACP register offset is incorrectly listed making
definition of g2d clock incorrect, which may lead to system failures
when trying to use G2D on systems on which firmware gates this clock
by default. Fix this and the register ordering as well.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
[t.figa: Updated patch description.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c