clk: vc5: Prevent division by zero on unconfigured outputs
authorMarek Vasut <marek.vasut@gmail.com>
Sun, 9 Jul 2017 13:28:07 +0000 (15:28 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Mon, 17 Jul 2017 18:50:59 +0000 (11:50 -0700)
commit3bded569cab4d839a47fcbd83e4e8926ae6ddad5
tree30fe34d02cc70aa9322fe89c1a79cabba01a0916
parent6d7489c74a6ed73b4751b58b56c247bedd780a78
clk: vc5: Prevent division by zero on unconfigured outputs

In case the initial values of the FOD registers are not configured in
the OTP or by the bootloader, it is possible that the FOD registers
will contain zeroes. The code in vc5_fod_recalc_rate() immediately
feeds the FOD divider value obtained from the FOD registers into the
div64_u64() and if the FOD divider value is zero, triggers division
by zero exception.

Check if the FOD divider value is zero and return the frequency of
the FOD output as 0 Hz if it is so. This prevents the division by
zero exception.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Alexey Firago <alexey_firago@mentor.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-renesas-soc@vger.kernel.org
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # Salvator-XS with the display LVDS output.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/clk-versaclock5.c